
Appendix A
18
(64)Start test real time clock.
(64)BIOS ROM data area check halfway. BIOS ROM data area che
(64)Copy BIOS to shadow RAM.
(64)Start test of real memory.
(64)Jump to User Patch 1.(Beep)=2
(65)DMA #2 base register test passed
. About to program DMA unit 1 and 2.
(65)Copy video BIOS to shadow RAM.
(65)Start test of extended memory.
(65)Memory address lines.
(66)DMA unit 1 and 2 programming over. About to initialize 8259 interrupt
(66)8254 timer channel #2.
(66)Save size of real and extended memory.
(66)Configure advanced cache registers.(Beep)=2
on over. About To start keyboard test.
Option installed CMOS bit.
(67)Initialize Multi Processor APIC.
)Prepare to return to real mode.
(68)Enable external and CPU caches.(Beep)=2
(69)Setup System Management Mode(SMM) area.
(6A) Keyboard controller.
(6A) Display external cache size.(Beep)=2
(6B)Display error messages.
(6B)Load custom defaults(optional).
(6C)Test hard disk drive.
(6C)Test serial port(RS232).
play shadow message.(Beep)=2
1.Display error messages.
(6D)Initialize KB OK display string.
(6E)Determine size to test.
)Display possible high address for UMB recovery. Display non
3.Configure ROM/RAM BIOS.
(6F)Start of MEMORY TEST.
(6F)Test floppy drive controller.
(70)start of keyboard test.
(70)Test hard drive controller.
(70)Display error messages.(Beep)=2
(71)Keyboard controller BAT tes
(71)Test each RAM segment.
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